What is CMOS? Working Principle & Its Applications

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What is CMOS?

CMOS is the short-term solution for Complementary Metal Oxide Semiconductors. In the computer chip design business, CMOS technology is one of the most widely used technologies that help create integrated circuits in various applications. It is a popular MOSFET technology used in today’s computer memory, CPUs, and mobile phones because it has numerous advantages. Semiconductor devices like the P and N channels are used in CMOS, also known as PMOS and NMOS. With CMOS technology, relevant professionals can design microcontroller chips, microprocessors, RAM, ROM, Application Specific Integrated Circuits (ASICs), and EEPROM. Knowing about its working principles and applications is important before using it.

How was CMOS Developed?

George Sziklai established the notion of complementary symmetry in 1953. However, Frank Wanlass of Fairchild Semiconductor invented the Complementary Metal Oxide Semiconductor technique. He, along with Chih-Tang Sah demonstrated at the 1963 International Solid-State Circuits Conference. Wanlass later submitted a US patent on Complementary Metal Oxide Semiconductor circuitry, which was issued in 1967.

What is Its Working Principle?

  • The CMOS circuit uses both P-type and N-type transistors to create logic functions, which are essential components in designing integrated circuits. The signal that turns ON one type of transistor can also turn OFF another type of transistor. This feature enables the creation of logic devices with simple and basic switches and no pull-up resistors.

  • The CMOS logic family includes n-type MOSFETs (transistors) arranged in a pull-down network that connects the output to the low-voltage power supply rail (Vss or the ground).Furthermore, Complementary Metal Oxide Semiconductor logic gates use a pull-up network of p-type MOSFETs between the output and the higher voltage rail (commonly known as Vdd) instead of load resistors like NMOS logic gates. So, if both p-type and n-type transistors have their gates linked to the same input, the p-type MOSFET will be ON while the n-type MOSFET is off and vice versa.

  • Complementary Metal Oxide Semiconductor has relatively low power loss, high noise margins in both modes, and fast speed, and it can function over a broad range of source and input voltages (provided the source voltage is fixed). Furthermore, to better grasp the Complementary Metal Oxide Semiconductor working principle, you must briefly explore Complementary Metal Oxide Semiconductor logic gates.

What is the Advantage of CMOS Technology over Bipolar Technology?

The main advantage of CMOS over bipolar technology is its significantly lower power dissipation. In contrast to bipolar circuits, a Complementary MOS circuit has nearly little static power dissipation. Power is only dissipated if the circuit switches. This enables the integration of more Complementary Metal Oxide Semiconductor gates on an IC than in NMOS or bipolar technology, resulting in much-improved performance.

What is CMOS Logic Family?

Let’s assume a Complementary Metal Oxide Semiconductor inverter circuit consists of p-type and n-type MOSFET. Input A will serve as the gate voltage for both transistors. 

Digrammatic Representation of CMOS


The NMOS transistor will receive input from Vss (ground), while the PMOS transistor will receive input from Vdd. For output, the Y terminal will be used. When a high voltage (~ Vdd) is applied to the inverter’s input terminal (A), the PMOS opens and the NMOS switches off, causing the output to be pushed down to Vss.

When a low voltage (<Vdd, ~0v) is provided to the inverter, the NMOS turns off, and the PMOS turns on. So, the output becomes Vdd, or the circuit is brought up to Vdd.

InputLogic InputOutputLogic Output

What is CMOS NAND Gate

Suppose there’s a 2-input CMOS NAND gate consisting of two series NMOS transistors between Y and Ground and two parallel PMOS transistors between Y and VDD. 

If either input A or B is logic 0, at least one of the NMOS transistors will be turned off, interrupting the flow from Y to Ground. However, at least one of the pMOS transistors will be active, forming a channel from Y to VDD.

Thus, the Y output will be high. If both the inputs are high both NMOS transistors will be ON and both the PMOS transistors will be OFF. Consequently, the output will be low. The truth table of the NAND gate is shown in the following table.

ABPull-down NetworkPull-Up NetworkOutput Y

What is CMOS NOR Gate

To explain this, let’s take a 2-input NOR gate into consideration. When either input is high, the NMOS transistors in parallel pull the output low. The PMOS transistors are connected in series to pull the output high when both inputs are low. Hence, the output is never left floating. 

The truth table of the NOR gate is given in the table below:


What is the Fabrication of CMOS?

Complementary Metal Oxide Semiconductor transistors can be fabricated on silicon wafers. The diameter of the wafer varies from 20mm to 300mm. In some cases, the lithography process is identical to the printing press. At each phase, different materials can be deposited, etched, or patterned. This procedure is fairly straightforward to grasp by looking at the wafer’s top and cross-section using a simplified assembly method. Complementary Metal Oxide Semiconductor manufacturing may be achieved by utilizing three technologies: N-well pt P-well, Twin well, and SOI (Silicon on Insulator).

What are the Characteristics of CMOS?

The most important characteristics of Complementary Metal Oxide Semiconductor are its low static power utilization and high noise immunity. When a single transistor from a pair of MOSFET transistors is turned off, the series combination consumes substantial power while switching between the two states, ON and OFF. Therefore, these devices produce no waste heat compared to other logic circuits, such as TTL or NMOS logic, which often require some standing current even while their state remains constant.

These features will enable the integration of logic functions in high density on an integrated circuit. As a result, Complementary Metal Oxide Semiconductor has emerged as the most widely utilized technology for VLSI chips.

The term MOS refers to the physical structure of a MOSFET, which consists of an electrode with a metal gate atop a semiconductor oxide insulator. A substance like aluminum is only used once, but it is now polysilicon. Using high-κ dielectric materials in the Complementary Metal Oxide Semiconductor process can enable the creation of additional metal gates.

What are Its Applications?

Complementary Metal Oxide Semiconductor technology is widely used and has largely superseded Bipolar processes in almost all digital applications. The following integrated circuits were designed using Complementary Metal Oxide Semiconductor technology:

Image Sensors

Complementary Metal Oxide Semiconductor image sensors are utilized in digital cameras to turn pictures into digital data.

Microprocessors and Microcontrollers

Complementary Metal Oxide Semiconductor technology is used in the creation of microprocessors and microcontrollers, which are critical components of many electronic devices.

Analogue Circuits

Analogue circuits using Complementary Metal Oxide Semiconductor technology include data converters, RF (radio frequency) circuits, and highly integrated transceivers for a variety of communication applications.

What are the Benefits of Using CMOS?

The main benefit of CMOS over other technologies (TTL) is its excellent noise margin and lower power consumption. This is owing to the lack of a straight conducting channel from VDD (drain power voltage) to GND (ground), which causes fall times that are dependent on input circumstances, making digital signal transmission straightforward and low-cost using Complementary Metal Oxide Semiconductor devices.

Complementary Metal Oxide Semiconductor explains the amount of memory on a computer’s motherboard that is used to save BIOS settings. These settings typically comprise the date and time, as well as hardware settings. 

The common benefits of CMOS technology are:

  • Compatible with TTL
  • Complementary Metal Oxide Semiconductor logic uses less power whenever it is in a set state
  • Low power dissipation
  • The logic gates are very basic
  • Fan out is high
  • Compact
  • Noise immunity is good
  • Mechanically very strong
  • Input impedance is high
  • Large logic swing
  • Stability of temperature

What are the Disadvantages of CMOS?

The disadvantages of CMOS are as follows:

  • As compared to bipolar technologies, the packing density of Complementary Metal Oxide Semiconductor is low. 
  • When the processing steps increase, the cost of Complementary Metal Oxide Semiconductor also becomes high. However, there may be a solution to this problem. 
  • Another disadvantage of the Complementary Metal Oxide Semiconductor technology is that it requires two transistors to construct an inverter rather than one transistor, which means that the Complementary Metal Oxide Semiconductor takes up more space on the chip than the NMOS. 
  • Complementary Metal Oxide Semiconductor chips should be protected against static charges by shorting the leads; otherwise, static charges obtained within the leads will destroy the chip.


For efficient electrical power, using CMOS technology is a suitable choice. They do not need an electrical supply while transitioning from one condition to another. Furthermore, the complementary semiconductors operate together to block the o/p voltage. This results in low-power architecture that generates less heat. For this reason, CMOS has replaced previous designs, such as CDs, in photo sensors. CMOS is also utilized to design ICs, computer memory, non-volatile RAM and so on. 

The rising demand for designing integrated circuits is interlinked with the overall expansion of the semiconductor industry. For their smooth computer operations, many organizations require robust integrated circuits, which is likely to create a boom in the global semiconductor industry. If you want to learn about semiconductors, you can pursue the Certificate Programme in Digital VLSI Design offered by CEP, IIT Delhi. It is a 6-8 month short-term course that will provide you with hands-on exposure to standard tools and design methodologies that can be used in VLSI design and simulation tools. 


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